? semiconductor components industries, llc, 2015 february, 2015 ? rev. 1 1 publication order number: ntmfs6b03n/d ntmfs6b03n power mosfet 100 v, 4.8 m , 132 a, single n?channel features ? small footprint (5x6 mm) for compact design ? low r ds(on) to minimize conduction losses ? low q g and capacitance to minimize driver losses ? these devices are pb?free, halogen free/bfr free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain?to?source v oltage v dss 100 v gate?to?source v oltage v gs 20 v continuous drain current r jc (notes 1, 2, 3) steady state t c = 25 c i d 132 a t c = 100 c 83 power dissipation r jc (notes 1, 2) t c = 25 c p d 165 w t c = 100 c 65 continuous drain current r ja (notes 1, 2, 3) steady state t a = 25 c i d 19 a t a = 100 c 12 power dissipation r ja (notes 1 & 2) t a = 25 c p d 3.4 w t a = 100 c 1.4 pulsed drain current t a = 25 c, t p = 10 s i dm 470 a operating junction and storage temperature t j , t stg ?55 to + 150 c source current (body diode) i s 160 a single pulse drain?to?source avalanche energy (i l(pk) = 60 a) e as 180 mj lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. thermal resistance maximum ratings parameter symbol value unit junction?to?case ? steady state r jc 0.76 c/w junction?to?ambient ? steady state (note 2) r ja 38 1. the entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. surface?mounted on fr4 board using a 650 mm 2 , 2 oz. cu pad. 3. maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. marking diagram www. onsemi.com a = assembly location y = year w = work week zz = lot traceability 6b03n aywzz v (br)dss r ds(on) max i d max 100 v 4.8 m @ 10 v 132 a g (4) s (1,2,3) n?channel mosfet d (5) s s s g d d d d dfn5 (so?8fl) case 488aa style 1 1 see detailed ordering, marking and shipping information on page 5 of this data sheet. ordering information
ntmfs6b03n www. onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 100 v drain?to?source breakdown voltage temperature coefficient v (br)dss / t j 67.3 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 80 v t j = 25 c 10 a t j = 125 c 100 gate?to?source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 4) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 2.0 4.0 v threshold temperature coefficient v gs(th) /t j ?8.1 mv/ c drain?to?source on resistance r ds(on) v gs = 10 v i d = 20 a 3.8 4.8 m v gs = 6.0 v i d = 10 a 6.0 7.8 charges, capacitances & gate resistance input capacitance c iss v gs = 0 v, f = 1 mhz, v ds = 50 v 4200 pf output capacitance c oss 760 reverse transfer capacitance c rss 31 total gate charge q g(tot) v gs = 10 v, v ds = 50 v; i d = 50 a 58 nc threshold gate charge q g(th) 6.2 gate?to?source charge q gs 19 gate?to?drain charge q gd 17 plateau voltage v gp 5.4 v gate resistance r g t j = 25 c 1.0 switching characteristics (note 5) turn?on delay time t d(on) v gs = 10 v, v ds = 50 v, i d = 50 a, r g = 1.0 16 ns rise time t r 46 turn?off delay time t d(off) 29 fall time t f 11 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 50 a t j = 25 c 0.9 1.2 v t j = 125 c 0.8 reverse recovery time t rr v gs = 0 v, di s /d t = 100 a/ s, i s = 25 a 67 ns charge time t a 35 discharge time t b 31 reverse recovery charge q rr 120 nc product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. pulse test: pulse width 300 s, duty cycle 2%. 5. switching characteristics are independent of operating junction temperatures.
ntmfs6b03n www. onsemi.com 3 typical characteristics figure 1. on?region characteristics figure 2. transfer characteristics v ds , drain?to?source voltage (v) v gs , gate?t o?source voltage (v) 3.0 1.0 0 0 20 100 6 5 4 2 1 0 figure 3. on?resistance vs. gate?to?source voltage figure 4. on?resistance vs. drain current and gate voltage v gs , gate voltage (v) i d , drain current (a) 9.0 8.0 7.0 10 7.5 6.5 6.0 4.5 3 7 25 30 20 15 4.5 5.0 8.0 3.0 figure 5. on?resistance variation with temperature figure 6. drain?to?source leakage current vs. voltage t j , junction temperature ( c) v ds , drain?to?source voltage (v) 150 125 100 75 25 0 ?25 ?50 0.8 1.2 100 70 60 40 20 10 i d , drain current (a) i d , drain current (a) r ds(on) , drain?to?source resistance (m ) r ds(on) , drain?to?source resistance (m ) r ds(on) , normalized drain?to? source resistance i dss , leakage (na) 4.5 v 4.0 v v ds 10 v t j = 25 c t j = 125 c t j = ?55 c 6 i d = 20 a t j = 25 c v gs = 6.0 v t j = 25 c v gs = 10 v 50 i d = 20 a v gs = 10 v t j = 25 c t j = 125 c 3 4 8 1.0 1.4 0.4 1.6 10 120 10 5.5 v 2.0 0 40 100 80 140 20 120 11 3.5 2.0 2.2 60 80 4.0 7.0 2.5 5.0 v v gs = 6 v to 10 v 40 140 60 5.0 45 50 35 40 0.6 10k 1k 1 0.5 1.5 5.5 8.5 9.5 5 9 5.5 6.0 6.5 7.5 1.8 t j = 150 c 100k 30 50 80 90 100 10
ntmfs6b03n www. onsemi.com 4 typical characteristics figure 7. capacitance variation figure 8. gate?to?source and drain?to?source voltage vs. total charge v ds , drain?to?source voltage (v) q g , total gate charge (nc) 100 10 1 1 figure 9. resistive switching time variation vs. gate resistance figure 10. diode forward voltage vs. current r g , gate resistance ( ) v sd , source?to?drain voltage (v) 100 10 1 1 10 100 1000 0.9 0.8 0.7 0.6 0.4 0.3 0 20 40 100 c, capacitance (pf) v gs , gate?t o?source voltage (v) t, time (ns) i s , source current (a) v gs = 0 v t j = 25 c f = 1 mhz c iss c oss c rss q t v ds = 50 v i d = 50 a v gs = 10 v t d(on) t r t f t j = 25 c 10 100 1.2 0 2 12 020 5 25 40 45 60 t j = 25 c v ds = 50 v i d = 50 a 120 160 200 30 10 1000 10,000 6 8 10 4 q gs q gd t d(off) 50 0.5 60 80 140 180 15 35 55 1.0 1.1 figure 11. maximum rated forward biased safe operating area v ds , drain?to?source voltage (v) 100 10 1 0.1 0.01 0.1 1 10 100 1000 i d , drain current (a) v gs 10 v single pulse t c = 25 c r ds(on) limit thermal limit package limit 500 s 1 ms 10 ms
ntmfs6b03n www. onsemi.com 5 typical characteristics figure 12. g fs vs. i d i d , drain current (a) 120 80 20 0 0 20 60 80 100 140 pulse time (sec) 0.01 0.001 10 1 0.0001 0.00001 0.1 0.000001 0.001 0.01 0.1 1 10 100 g fs , small?signal forward transfer conductance (s) r(t) ( c/w) 100 1000 50% duty cycle 20% 10% 5% 2% 1% single pulse ntmfs6b03n, 650 mm 2 , 2 oz, cu single layer pad figure 13. i peak vs. t av t av , time in avalanche (sec) 10e?3 1e?3 100e?6 1 10 100 i peak , drain current (a) figure 14. thermal response 40 60 100 140 40 120 100 c 25 c device ordering information device marking package shipping ? NTMFS6B03NT1G 6b03n dfn5 (pb?free) 1500 / tape & reel ntmfs6b03nt3g 6b03n dfn5 (pb?free) 5000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntmfs6b03n www. onsemi.com 6 package dimensions dfn5 5x6, 1.27p (so?8fl) case 488aa issue l style 1: pin 1. source 2. source 3. source 4. gate 5. drain *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 1.270 2x 0.750 1.000 0.905 4.530 1.530 4.560 0.495 3.200 1.330 0.965 2x 2x 4x 4x pitch dimensions: millimeters 1 recommended m 3.00 3.40 0 ??? 3.80 12 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeter. 3. dimension d1 and e1 do not include mold flash protrusions or gate burrs. 1234 top view side view bottom view d1 e1 d e 2 2 b a 0.20 c 0.20 c 2 x 2 x dim min nom millimeters a 0.90 1.00 a1 0.00 ??? b 0.33 0.41 c 0.23 0.28 d 5.15 d1 4.70 4.90 d2 3.80 4.00 e 6.15 e1 5.70 5.90 e2 3.45 3.65 e 1.27 bsc g 0.51 0.61 k 1.20 1.35 l 0.51 0.61 l1 0.125 ref a 0.10 c 0.10 c detail a 14 l1 e/2 8x d2 g e2 k b a 0.10 b c 0.05 c l detail a a1 e 3 x c 4 x c seating plane max 1.10 0.05 0.51 0.33 5.10 4.20 6.10 3.85 0.71 1.50 0.71 m pin 5 (exposed pad) 5.00 5.30 6.00 6.30 on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ntmfs6b03n/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
|
